Control circuit for vending and other coin controlled devices

ABSTRACT

A control circuit for vending and other coin controlled devices, said circuit including separate counter means, one of which establishes a credit condition for moneys or other forms of credits deposited or otherwise entered and the other of which has the vend price as well as amounts accumulated in excess of the vend price entered in it to control refunding and escrowing. The circuit also includes means for comparing the amounts accumulated in the separate counter means for the purpose of controlling vending, payback of excessive deposits, counter reset and subsequent operations of the vending machine, and the circuit includes means which recognize, decode and make use of various relationships between the amounts accumulated in the separate counter means to control the paying out in particular coins, coin denominations and combinations thereof and in the least possible number of available coins. It is also an important feature that this present circuit makes use of integrated circuit elements which substantially reduce the number of circuit elements required and the size and space requirements for the circuit.

Levasseur 51 Oct. 15, 1974 OTHER COIN CONTROLLED DEVICES CONTROL CIRCUITFOR VENDING AND [75] Inventor: Joseph L. Levasseur, St. Louis, Mo.

[73] Assignee: II. R. Electronics Company, High Ridge, Mo.

[22] Filed: July 23, 1973 [21] Appl. No.: 381,900

[52] US. Cl 194/1 N [51] Int. Cl. 607E 5/22 [58] Field of Search 194/1N, l M, 10, 9 R, 194/D1G. 3

[56] References Cited UNITED STATES PATENTS 3,365,045 1/1968 Guttmann194/1 N 3,482,670 12/1969 Yamashita.... 194/10 3,508,636 4/1970 Shirleyl. 194/1 N 3,703,229 11/1972 Bowring 194/1 N Primary Examiner-Robert B.Reeves Assistant Examiner-Thomas E. Kocovsky [57] ABSTRACT A controlcircuit for vending and other coin controlled devices, said circuitincluding separate counter means, one of which establishes a creditcondition for moneys or other forms of credits deposited or otherwiseentered and the other of which has the vend price as well as amountsaccumulated in excess of the vend price entered in it to controlrefunding and cscrowing.

The circuit also includes means for comparing the. amounts accumulatedin the separate counter means ments which substantially reduce thenumber of cirl cuit elements required and the size and spacerequirements for the circuit.

27 Claims, 5 Drawing Figures PATENTEB BUT I 1974 SHEET 10F 5 PATENIEDUCT1 51am SHEET 2 [IF 5 Noc CONTROL CIRCUIT FOR VENDING AND OTHER COINCONTROLLED DEVICES Many different electronic and mechanical controlsystems and circuits are in existence and have been used to controlvending and other machines and partic ularly to control and to providethe various requirements for the vending of products and services andfor the making of change and refunding. These include simple circuitmeans which cause vending upon accumulation of one or more coindenominations with the vending price usually not greater than thelargest acceptable denomination coin. The more complex systems anddevices include single sale price devices with change makingcapabilities wherein change is made by paying out coins of a singledenomination, and devices are also known which have the capability ofvending at more than one price and accepting and paying out or refundingcoins of two or more denominations, and for change making and refundingor escrowing, as well as being able to perform other functions andcombinations of functions.

The complexity and cost of the known circuits, devices and systemsincreases as they have added to them such capabilities as refundingdeposits using the same or different coins sometimes called escrowing oruntil a particular product is selected for vending. An example of such acircuit is disclosed in Levasseur US. patent application Ser. No.331,380. For an example of a circuit with multiple vend price selectioncapability, see Johnson US. Pat. No. 3,687,255; for a circuit withextended price and payback capability, see Douglass US. application Ser.No. 204,988; for a circuit control means capable of accepting and beingused to accept almost any different combination of coin denominationsincluding any of the various US. and foreign coin denomination systems,see Levasseur U.S. patent application Ser. No. 267,558; for systemscapable of paying out change and refunds with the fewest possible numberof coins and capable of switching to different coin payouts when thesupply of one or more coin denominations has been depleted, see the sameU.S. applica-. tions Ser. Nos. 204,988 and 267,558; and systems orcircuits which have various forms of anticheating devices and featureswhich add to their complexity are shown in many of the above and otherpatents and applications, all of which patents and applications as wellas others, are assigned to Applicants assignee. Other systems andcircuits including those capable of accepting dollar bills and otherpaper money and systems capable of paying out three or more differentdenomination coins during refunding and escrowing are also known.

The devices disclosed in the above identified and other US. and foreignLetters Patent and pending applications have solved many of the problemsof the vending industry and have substantially increased the flexibilityand versatility of control devices and particularly control circuits forcontrolling vending machines and the like. However, it can be readilyunderstood that to provide a single system or control which canaccomplish all of the above mentioned requirements as well as othersusing conventional and existing technology would require very complexcontrols and circuitry and might not be advantageous from the coststandpoint particularly in relation to the less complex systems whichprovide a fairly broad range of capabilities with factors in thisregard. Furthermore, with the less versatile and less complex circuitsand systems greater production volume can usually be obtained because ofthe reduced manufacturing costs involved and the lower selling price,and this makes them more readily available and more widely used.

The system and circuit disclosed in the present case achieves many ofthe desired results by using integrated circuits in a way which vastlyincreases the versatility and flexibility while at the same timeproviding a relatively simple arrangement and at a minimum cost and witha minimum of parts and .equipment being required. Furthermore, thesubject improved construction can be made to be extremely compact andlightweight and can be made to be relatively trouble free. To accomplishall of the above and other objectives as set forth, the present circuitprovides means which reduce system costs by employing relatively largescale integrated circuit packaging which is designed to give the circuitversatility. The use of large scale integrated circuits also reduces thecircuit design time, minimizes inventory requirements and reduces thenumber of circuit connections that must be made at the assembly site,and the subject circuit lends itself to being constructed to satisfymany different requirements and applications using the same basicbuilding blocks and circuit connections. For example, the presentcircuit construction can be made to include means to accumulate thevalue of any combination of money deposits, it can include means toestablish any desired vend price and to accumulate and control anyrequired payouts using the same or separate accumulator means, it can beused to determine conditions of equality as well as various incrementaldifferences between amounts stored in two or more accumulators, it caninclude means to control the payout of amounts deposited using the leastnumber of coins available to achieve the payout, it can be interfacedwith single as well as with multiple vend price machines, it can be usedwith control means capable of vending at one or more than one differentvend prices, it can be used to refund accumulations until a vendselection is initiated, it can control the paying out of one, two orthree different denomination coins, and can make refunds or escrows inthe least number of coins, and it may include means for generating anynumber of pulses as required for the incremental value of creditaccumulated when coins, tokens, credit cards or other means representingmoney are entered or deposited. The present control circuit can also beused to provide deposit refunding or escrowing, if desired, and so faras known, the present control circuit is the most versatile vendingcontrol circuit yet devised and represents a new generation of controlcircuit technology in the vending control field.

It is therefore a principal object of the presentinvention to provideimproved and more versatile means for controlling the operation ofvending machines and other coin and money controlled devices.

Another object is to provide an integrated circuit capable of being usedto provide logic and arithmetic functions in a vending control andrefunding operation.

Another object is to provide a relatively inexpensive, compact,lightweight and trouble-free vending control circuit.

Another object is to provide means for refunding amounts accumulated ina vending machine until a product has been successfully selected at atime when the amount accumulated at least equals the cost of theselected product.

Another object is to minimize the possibilities for cheating a vendingmachine.

Another object is to eliminate the need for mechanical latching andlockout selection means which in the past has been required in controldevices where one or more vend prices are available and selectable.

Another object is to provide improved means for accumulating and payingout 'or refunding amounts in various coins and coin denominations,including in any of the various coinage systems presently in existence.

Another object is to teach the construction and operation of a controlcircuit having integrated circuit portions which minimize the supportingcircuitry required to be used in association therewith.

Another object is to simplify the circuitry and circuit design requiredin vending control devices and circuits.

Another object is to teach the construction and operation of arelatively versatile integrated circuit for use in vending controlcircuits and the like.

Another object is to teach the construction of a relatively simplecomponent or integrated circuit chip which has both logic andaccumulation capabilities.

These and other objects and advantages of the present invention willbecome apparent after considering the following specification whichcovers several preferred embodiments thereof in conjunction with theaccompanying drawings, wherein:

FIG. 1 is a schematic block diagram showing the more important circuitcomponents and the connections therefor of a versatile vending controlcircuit constructed according to oneform of the present invention;

FIG. 2 is a more detailed circuit diagram of the programmable clockportion of the circuit shown in FIG.

FIG. 3 is a more detailed circuit diagram of those portions of thecircuit shown in FIG. 1 that are included within the dashed lineidentified therein by the number 10;

FIG. 4 is a detailed circuit diagram showing more of the circuit detailsof the escrow control, payout control, and vend control portions of thecircuit shown in FIG. 1; and,

FIG. 5 is a diagram similar to that shown in FIG. 4 but for use on avending machine capable of vending at two or more different vend prices.

Referring to the drawings more particularly by reference numbers, numberin FIG. 1 identifies that portion of the subject control circuit whichis totally integrated and is included in a single package or chip. Thecircuitry included in the outline 10 may be similar for both embodimentsof the present construction that are disclosed including the embodimentwhich includes those portions disclosed in the one-price construction ofFIGS. 1-4 as well as in the circuit shown in FIG. 5.

The block form of the circuit shown in FIG. I is made up of a pluralityof different circuit portions each of which will be described in detailhereinafter. The principal circuits or circuit portions include aprogrammable clock circuit 12, a counter or accumulator circuit 14,sometimes called the A Counter, a comparator circuit 16, an inhibitcircuit 18, a second counter or accumulator circuit 20, sometimes calledthe B Counter. a price encoder circuit 22, an output decoder circuit 24,an escrow circuit 26, a payout control circuit 28 and a vend controlcircuit 30. In the circuit as shown in FIG. 1, the circuit portions 14,16, 18, 20 and 24 are preferably all included in a single integratedcircuit member or chip referred to generally by the number 10. Thisintegrated circuit will have output connections which can be connectedinto the circuit in different ways to enable it to be used to performmany different functions and combinations as .will be explained. Thissubstantially reduces the size and expense of the subject circuit whileat the same time making the circuit extremely flexible and versatile. Inthe detailed specification which follows the individual more importantcircuit components will be described individually in detail, andsubtitles will be used for ease in referring to and finding the variousdescriptions.

PROGRAMMABLE CLOCK The programmable clock 12 is constructed to provide aproper number of pulses for the credit inputs which are received from acoin unit or other similar input device including any input unit capableof receiving coins, tokens, paper money, credit cards and other similardevices. The credit input means are indicated generally by number 32 andhave. a plurality of output connections which are connected tocorresponding inputs to the programmable clock circuit 12. In thedrawings, the inputs to the clock unit are labeled 34, 36, 38, 40, 42and 44. The actual input connections between the credit unit 32 and theprogrammable clock unit 12 may be made by various types of interfacingmeans ineluding electric connections, magnetic connections. opticalinterfaces and so forth.

When an input is received at the input terminal 34, the programmableclock unit provides one output pulse which appears on output lead 46which is the A output lead. This output can represent a penny, a nickelor any other basic unit of credit, including basic units of foreignmoney as well. Whenever an input is received at the input connection 36,two output pulses are produced on the clock output lead 46, representingtwice the basic unit. Similarly. an input on the input lead 38 producesthree outputs on clock output lead 46, an input at the input connection40 produces four outputs on clock output lead 46, an input on the inputlead 42 produces five outputs, and an input on clock input lead 44produces ten output pulses on the output lead 46. Obviously a greater orlesser number of clock input and output pulse combinations can also beprovided as desired. The clock outputs available on the lead 46 in thecircuit as shown are available whenever another input to theprogrammable clock 12, namely, an input on lead 48 (labeled OutputEnable Input) is in a particular state such as ina low voltage state.When the input at the lead 48 is at a high state or high voltagecondition then the clock pulses from the programmable clock 12 will exitfrom another output lead 50 which/is labeled the B output lead.

The programmable clock 12 has other input leads labeled payout inputs52, 54 and 56, and these can be used for generating one, two or fivepulses respectively to control the paying out of change. One, two andfive in the case shown represent respectively the paying out of nickels,dimes and quarters. These inputs are connected to other locations in thecircuit which will be described later. It is sufficient at this point torecognize that the programmable clock 12 is in the nature of acontrollable pulse generator which receives input pulses when coins orother forms of credits are depos ited or otherwise entered in thevending machine according to the amount of the deposit, and it alsoincludes means responsive to other means which control the amount ofmoney by coin denomination to be refunded for each amount entered thatis in excess of a selected vend, or to make a total deposit refund orescrow when a customer after making a deposit decides for some reasonnot to carry through with a vend. This can occur because the customerchanges his mind after making a partial deposit, discovers that he doesnot have enough money to complete a desired vend, dis covers that thesupply of the product he wishes to purchase is exhausted in'the vendingmachine, or for some other reasons decides that he wants his depositback.

In addition to the connections to the programmable clock circuitdiscussed above, the clock circuit has another input 58 which is itsreset input. When this input is held at a high state, it stops any clockpulses from being programmed and/or from being generated. A controlcircuit such as a vend control circuit with a programmable clock such asthe clock 12 provides an extremely versatile and flexible means tocontrol and keep track of amounts deposited and refunded, and it does soby means that are adaptable for use with any of the known existingcoinage systems in use in the world.

COUNTER AND COMPARATOR CIRCUITS The A counter circuit 14 receives inputsas aforesaid from the programmable clock circuit 12 on lead 46. Thesepulses from the clock circuit are fed to one terminal of an AND gate 60which has its output con nected by lead 62 to the input or countterminal of the counter 14. The counter 14 also has an output terminalwhich is labeled 64 and is connected by another lead 66 to the otherinput of the AND gate 60. The output terminal 64 has a signal producedon it whenever the count in the counter 14 reaches some predeterminedmaximum count such as 31 in the case shown. A count of 31 is the maximumpossible count for a five stage binary counter and is obtained by addingthe possible counts for the stages of l, 2, 4, 8 and 16. When a count of31 is reached a signal will be produced at the output terminal 64 and onthe lead 66 to prevent the AND gate 60 from enabling the outputsproduced by the clock circuit 12 from being fed to the A counter 14.This prevents further accumulation beyond the binary limitation whichotherwise would result in the loss of 31 counts or credit increments.

The means by which a sufficient credit accumulation. for a given vend isdetermined is accomplished by means of the price encoder circuit 22which is constructed and connected to directly set into or transfer intoselected ones of the binary stages of the B counter circuit 20 by way ofits input leads '68, 70, 72, 74 and 76 the amount of a selected vendprice. The leads 68-76 encode into the respective stages of the counter20, one, two, four, eight and sixteen increments of any combinationthereof. The counter circuit 20 also has output connections from each ofthe respective stages which are connected to the inhibit circuit 18, andfrom there to corresponding inputs of the comparatorcircuit 16. Inaddition, the counter 20'has an'input which is connected to the outputof the programmable clock circuit 12 on clock output lead 50.

The purpose of the comparator circuit 16 is to add the binary complement(inverted amount entered therein) from the counter circuit 14 to thebinary amount in the corresponding stages present at the outputconnections of the counter circuit 20 to produce a resultant binarysummation of these two amounts. This summation appears on outputterminals 78, 80, 82, 84 and 86 of the comparator circuit 16. The outputsignals which appear on these leads are fed'tothe decoder circuit 24 andare represented therein as the incremental difference between theamounts accumulated in the counters l4 and 20.

The inhibit circuit 18 is a gate type circuit and is included to providemeans to decode the amounts accumulated in the accumulator l4irrespective of the condition of the counter circuit 20. The inhibitfunction occurs whenever the input to the inhibit circuit 18 is at ahigh voltage state. The input lead to the inhibit-circuit 18 isidentified as lead 88 and this is shown grounded as is another lead 90which is connected to another control input of the comparator circuit16. Either or both of these connections may optionally include means tomake them go high under certain conditions and to satisfy other designrequirements (not shown). The comparator circuit 16 also has a carryoutput lead 92 which is at a low state at all times except at times whenthe amount accumulated in the counter 20 is greater than the amountaccumulated in the counter 14. In the present circuit the counters 14and 20, the comparator circuit 16, the inhibit gate circuit 18, thedecoder circuit 24, and the internal circuitry associated therewith arepreferably all included in a single, relatively small and compactintegrated circuit member or element. The details of these circuits areshown in the drawings and will be described more in detail in connectionwith FIG. 3.

DECODER output leads 78-86 of the comparator circuit 16 and the decoderhas an input connection to the carry output lead 92 from the comparatorcircuit and it has a plurality of output leads 94, 96, 98, and 102.These leads go to low conditions when they are active. The output lead94 goes to a low condition whenever the A counter 14 has an amountaccumulated therein that exactly equals the amount that is accumulatedin the B counter 20. This is illustrated in the drawing by theexpression A B adjacent to the lead 94. In a similar manner, the voltageon the encoder output lead 96 goes low whenever the amount accumulatedin the counter 14 is one or more increments greater than the amountaccumulated in the counter 20, the voltage on the output lead 98 goeslow whenever the amount entered in the counter 14 is two or moreincrements greater than the amount in the counter the voltage on theoutput lead goes low whenever the amount entered in the counter 14 isthree more increments greater than the amount in the counter 20; and thevoltage on the lead 102 goes low whenever the counter 14 has in it fiveor more increments more than are entered in the counter 20. Only one ofthe encoder output leads 94, 96, 98, 100 or 102 can be at a lowcondition at any one time, and the highest detected incrementaldifference between the amounts entered in the counters will prevail.That is, if the condition exists for an output on the lead 102 to below, this will prevail and take precedence over possible lows which mayalso exist on the other three output leads 96, 98 and 100, and so forth.

The encoder circuit 24 has two other inhibit input connections, onebeing an inhibit input described as a two or more input inhibit whichappears on lead 104 and the other is described as a five or more inputinhibit which appears on lead 106. When either of the leads 104 or 106is at a low state due to closure of a respective empty coin switch 108or 110 they operate to prevent the encoder output leads 98 and 102 frombeing operative, and they also enable another next highest incrementaldifference encoder output lead to assume control. In the circuit asshown, the encoder output lead 100, which is the three or greaterencoder output lead, is shown to be independent of the other decoderoutput leads, and this lead is not connected in the present circuit.This is done because the circuit as shown is wired primarily toaccommodate a monetary system such as that used in the United Stateswhere one increment represents a nickel, two increments represent adime, and five increments represent a quarter. In monetary systems wheredifferent combinations of increment values are used it may be necessaryto use the lead 100 and to provide another associated inhibit inputconnection. In such a case, it may also be necessary to provide anadditional coin switch corresponding to the different value coins.

VEND CONTROL The vend control circuit 30 is enabled by signals itreceives on lead which is the output lead of AND gate 122. The AND gate122 has two input connections, one of which is connected to the carryoutput 92 of the comparator circuit 16 and the other to the output ofthe B counter 20 which receives a signal whenever the counter 20 has anamount accumulated that is greater than zero. The counter input to theAND gate 122 is on lead 124 and is an indication of the presence of anencoded price. A carry output from the comparator circuit 16 on thecarry output lead 92 indicates that the A counter 14 has an amountaccumulated at least equal to the amount accumulated in the counter 20.When these conditions exist at the same time, the AND gate 122 willproduce an output signal which enables the vend control 30.

The vend control 30 provides output which are indications of productselection and are fed through another AND gate 126 to gate output lead128, see FIGS. 1 and 4. The AND gate 126 has three inputs, one of whichis the same as that which is connected to the input of the AND gate 122on lead 124, the second is on lead 130 which is an output lead of thevend control circuit 30, and the third is on the lead 94 which is thecounter equality A B output lead of the decoder circuit 24. The AND gate126 is satisfied whenever the B counter 20 has no accumulation so thatthere is a signal on the lead 124 and when at the same time the Acounter 14 has an amount in it that is not equal to the count in the Bcounter 20 as indicated by thesignal present on the lead 94. When thevend control circuit 30 is enabled by receiving an input at the lead120, it initiates a vend delivery function and it also operates toinhibit the escrow control 26. Inhibiting an escrow is accomplished byproducing an output signal in the vend control 30 for feeding to theescrow control 26 on lead 132. In this way also the payout controlcircuit 28 is enabled through a circuit which includes an OR gate 134that has two input connections, one of which receives outputs from thevend control circuit 30 on 'lead 136, and the other input is from theescrow control circuit 26 on the lead 138. When either of the inputs tothe OR gate 134 on leads 136 or 138 is present, the OR gate 134 willproduce an output on its output lead 140 for feeding to and enabling thepayout control circuit 28. The escrow control circuit 26 and the payoutcontrol circuit 28 both have reset input connections which are connectedto the equality A B output lead 94 of the decoder circuit 24 for resetpurposes. In addition, the escrow control circuit 26 has a switchoperated enable input 142 which is connected to be operated by actuationof an escrow switch 144. The escrow control circuit 26 also has aninhibit output lead 146 which 'is connected to an inhibit input to thevend control circuit 30. This connection like the inhibit input providedby signals on the lead 132 prevents a vend control circuit 30 fromoperating and producing a vend whenever the escrow control 26 isactuated. The same is true but in reverse sense whenever the vendcontrol circuit 30 is operated first. The details of the escrow circuit26 are input connection is provided from the vend control cir- I cuit 30on lead 148. This latter connection operates to reset the payout controlcircuit 28 whenever the vend control circuit 30 receives identicalinputs from the counter circuits l4 and 20 indicating equality. This isindicated on the drawing by the legend R The vend control circuit 30 hasa second output connection to the price encoder circuit 22. This is anoptional connection and is shown as including lead 150 and AND gate 152(FIG. 1). This connection is included whenever additional price encodingmeans are required as is true in systems that have the capacity forvending at more than one vend price.

PAYOUT CONTROL The payout control circuit 28 provides means to controlthe paying out of coins to'the customer of amounts which representaccumulations in the counter 14 in excess of the vend price asestablished and encoded in the number of coins that will be paid out bysignals it receives on the leads 96, 98 and 102 in the output of thedecoder circuit 24. For example, a signal on the lead 96 calls for apayout of one coin increment, a signal on the lead 98 calls for a payoutof a coin of two increments value, and a signal on the lead 102 callsfor a payout of a coin representing fiveincrements. As each coin is paidout the programmable clock circuit 12 is actuated to direct anappropriate number of pulses to the counter 20. The connections betweenthe payout control 28 and the clock 12 are fed by way of leads 160, I62and 164, which leads are connected respectively to the clock input lead52, 54 and 56. The lead 160 is the one increment lead, the lead 162 isthe two increment lead and the lead 164 is the five increment lead, one,two and five representing nickels, dimes and quarters respectively inthe circuit as shown. When outputs appear on any one of these leads, theclock 12 will be energized to produce a corresponding number of outputson the clock output lead 50 which is the connection to the counter 20.It is possible at this time to feed inpulses to the counter over thisconnection because the input lead 48, which is the B counter enableinput to the clock 12, is caused to go to a high condition under controlof the connection from the output enable connection 166 of the payoutcontrol circuit 28.

During payout operations, the clock pulses are directed to the B counter20 rather than to the A counter 14, and this continues to be true untilthe counter 20 has an amount accumulated in it that is equal to theamount accumulated in the counter 14. Both of these amounts arerepresented in binary form as indicated above. When this happens anequality output appears on the decoder output lead 94 which causes thevoltage on the lead 94 to go low. It is then possible to reset thepayout control circuit 28. This condition also establishes circuits toreset the counters l4 and 20. The resetting of the A counter 14 takesplace through lead 168 connected to an output of the payout control 28.The resetting of the B counter 20 takes place through another lead 170which receives outputs from either the escrow circuit 26 or from thepayout control circuit 28. The lead 170 is connected to the resetcontrol input of the B counter 20. At the same time the equality decoderoutput lead 94 applies another reset signal to the reset input of thevend control circuit 30. This reset signal is applied by way of anotherlead 171 if the vend time has elapsed. When the-vend control circuit 30is reset its output lead 148 goes low, and this inhibits the resettingof the counters l4 and 20 by way of the payout control 28 until afterthe vend time is over. As will be explained, the reset output producedon the equality (A B) lead 94 also operates to reset the escrow control26.

ESCROW CONTROL The escrow control 26 is disclosed in detail in FIG. 4and provides the means in the subject circuit whereby a customer mayobtain a complete refund of any deposit or accumulation present in thecounter 14 as long as the inhibit input thereto on lead 132 from thevend control circuit 30 is not operating to prevent escrow. In order forthe escrow means to be effective the equality output lead 94 of thedecoder circuit 24 should not be indicating equality. If theseconditions are satisfied an escrow operation can be initiated at anytime by the customer activating the escrow switch 144. When the escrowswitch 144 is activated the escrow control circuit 26 operates toinhibit operation of the vend control circuit 30 by a signal that isproduced on the inhibit output lead 146, and at the same time the escrowcontrol circuit produces an output on the lead 138 which is applied toone of the inputs of the OR gate 134 and to the input of the payoutcontrol circuit28. The energizing of the escrow control 26 also producesanother output on lead 174 and this output is applied to the OR gate 172and from there to the reset input of the counter 20 as alreadydescribed. With these conditions established by operation of the escrowcontrol 26, the payout control circuit 28 is set to control the payingout of coins until the B counter 20, which now, starts in resetdirection, is clocked to a count condition that .is equal to that countaccumulated in the counter 14. When this condition is reached, an outputlow condition will appear on the equality output lead 94 of the decodercircuit 24 to thereby reset the escrow control 26, the payout control28, and in turn the counters l4 and 20 as aforesaid.

To this point, the description has given a clear but to some extentbroad understanding of the structuraland operational details of thesubject circuit and a more detailed desciption follows. It should beapparent also that many of the circuits and-components including thecounters, the comparator, the inhibit means, and the decoder means arecapable of being packaged as integrated circuits in a substantiallyminiaturized form and this can be done by including all of these andother of the circuit elements in the same or in several integratedcircuit blocks or chips. By so doing, the same basic building block canbe used to fabricate control circuits having many different capabilitiesand connection possibilities including circuits capable of operating atone or more vend prices, circuits capable of refunding in one or inseveral different coin denominations including refunding in the fewestpossible coins, circuits capable of providing complete escrowcapability, and circuits capable of determining the amount of overage ofeach deposit for payback purposes based on the, price of a selectedvend. So far as known, no known control circuit has these capabilitiesand versatilities and therefore it is believed that this circuit and itsconstruction represents a new generation of control circuits for thepurposes indicated. The following portions of the specification describein even greater detail the circuit construction and operatingcharacteristics of the more important components of the subject circuit.This includes a description of a single price construction (FIG. 4) anda two or multiple price construction (FIG. 5).

shown in FIG. 2 of the drawings. The clock 12 as shown includes a fourstage binary counter 179 constructed of four D-type flip-flop circuits180, 182, 184 and 186. These flip-flops are clocked by an oscillatorcircuit 188 which includes a NOR gate 190, an inverter 192, a resistor194 and a capacitor 196 connected as shown. The oscillator circuit willclock whenever the input on its input lead 198 is at a low condition.The oscillator input lead 198 is the output lead of OR gate 200, andgoes low whenever the OR gate 200 has a low on either of its two inputs202 and 204. The gate input lead 204 is high whenever the clock binarycounter 179 is reset and causes a low condition on each input of OR gate206. The inputs to the OR gate 206 are connected respectively to the 0output terminals of the binary stages 180, 182, 184 and 186. Thisin turnproduces a low at the corresponding input to another NOR gate 208 on itsinput lead 210.

When a low condition is present on the clock input lead 34 it is appliedas one of two inputs to an AND gate circuit 212, and the output of thegate 212 is connected to one of a plurality of inputs 214 of another ANDgate 215. These conditions cause the output of the AND gate 215 on lead216 to go high. Since the lead 216 is connected as one of the two inputsto the OR gate 200, when the signal on the lead 216 is high it willoperate to inhibit operation of the clock. At the same time, and whilethe input on the lead 214 is low, the same low will also be applied asinputs on other gate input leads 218, 220, 222 and 224 of respectiveNAND gates 226, 228, 230 and 232, each of which has its output connectedto a respective SET input of one of the clock flip-flops 180, 182, 184and 186. When these conditions exist, they cause the gates 206 and 208to apply a low condition to the NOR gate 200 on the input lead 204.

Thereafter, when the condition on the clock input lead 34, which is theclock input lead that programs one clock pulse, returns to its highstate, the inputs to the gate 200 on input leads 202 and 204 will causea low condition to occur on the input lead 198 of the gate 190 and thisinput condition will allow the clock 12 to oscillate. Another NOR gate242 is connected to the oscillator circuit and has two of its threeinput connections 244 and 246 connected respectively to the input leads202 and 204 of the gate 200. When these input leads are low the outputgate connection 248 will clock and continue to do so until all of theinputs to the OR gate 206 go low. This will occur for the caseillustrated where there has been an input on the clock input lead 34after one clock pulse because in this condition it is the next binarystate after the set condition of the binary circuit 180-186.

In similar manner, when a pulse train of ten pulses is required, amomentary low will occur at the clock input 44 instead of at the clockinput 34, and this will start the clock with a preset count of 6 as setby the signals on input leads 250 and 252, respectively, of the NANDgates 228 and 230. For this condition, the oscillator circuit will berequired to clock ten pulses until the output lead 204 of the gate 208changes its state. During this clocking the first binary stage 180 ofthe clock counter 179 receives inputs on lead 254 which lead isconnected between the output of the gate 242 andlhe D input of the firststage flip-flop 180. At this time, the output lead 46, which is the leadthat connects the clock 12 to the counter 14 will have clock pulses onit if the input enable connection 48 from the output lead 166 of payoutcontrol circuit 28 is at a low condition. If the B output enable lead 48is at a high condition instead of a low condition then the outputs ofthe clock 12 will be fed instead to the B counter on the lead 50.

By setting the binary clock stages 180, 182, 184 and 186 to a countshort of 16, which is the reset count, the clock will provide an outputequal to the number of pulses that exists between the two states. Forexample, setting a count of 11 will require five clock pulses to reachthe sixteenth or reset pulse state. Whenever a high is introduced at theclock reset lead 58, it will cause the four binary stages 180, 182, 184and 186 of the clock circuit 179 to reset even if the clock has notcompleted its normal operation. This provision is included to preventany output from being produced on the output connection 256 of NAND gate258 in the output of the clock 12 (FIG. 2). This is because the NANDgate 258 receives a low at its other input 260 which is connected to thereset circuit. This connection includes an inverter 262 which has itsinput side connected to the clock reset input connection 58. The clockreset lead 58 is also connected directly to all of the reset inputs ofthe clock binary stages 180, 182, 184 and 186. The AND gate 212 which isconnected to the clock input 34, as well as other similar input ANDgates 264 and 266 in the credit input circuits of the clock 12 areconnected to the one, two and five increment inputs, respectively, ofthe clock circuit 12, and these gates are included simply to provideisolation for the respective credit inputs and also for the associatedinputs to the clock from the payout circuit 28 which are received on theleads 52, 54 and 56.

A preferred form of the credit input circuit 32 is shown in FIG. 2. Thecredit input circuit 32 includes a coin actuated switch 270 which, whentransferred from engagement with normally closed switch contact 272 toengagement with normally open contact 274, allows a capacitor 276 tocharge relatively slowly through a circuit which includes resistor278'selected because it has a relatively high resistance. The operationof the switch 270 allows another capacitor 280 to equalize its charge tothe charge on the capacitor 276. .Subsequently, when the switch 270returns to its deactivated condition in engagement with the normallyclosed contact 272, the capacitor 276 will discharge rapidly throughanother relatively low resistance resistor 282 to keep the currentwithin the limits of the coin switch 270. The rapid discharge of thecapacitor 276 causes a momentary low to occur at the output connection284. The duration of this momentary low is controlled by the resistanceof another resistor 286 and also by the action of the capacitor 280.The'particular form and construction of the credit input circuit 32 asdisclosed in the drawing is chosen for illustrative purposes only sincenumerous different types of credit input circuits could be used to pulsethe programmable clock 12.

COUNTERS, COMPARATOR AND DECODER DETAILS FIG. 3 shows the circuitdetails of the counter 14, the comparator 16, the inhibit circuit 18,the counter 20 and the decoder circuit 24. The counter 14 is shown asbeing a five stage binary counter made up of five D- type flip-flops300, 302, 304, 306 and 308. The first stage flip-flop 300 receives theinputs to the circuit 14 on lead 62, which is the output lead of the ANDgate 60, and all of the flip-flops have reset inputs which are connectedto the reset lead 168 from an output of the payout control circuit 28.Each of the flip-flop circuits, except for the first stage flip-flop300, also has a respective clock input 310, 312, 314 and 316 which isconnected respectively to the preceding stage of the counter. Forexample, the clock input to the second stage 302 is controlled by Qoutputs received from the first stage 300 and so on for the otherstages. This means that when inputs are received they are accumulated inthe usual manner for such counters. The accumulator circuit 14 also hasan output OR gate 318 which has a plurality of inputs connectedrespectively to each 6 output of the accumulator stages 300-308, and thegate 318 has an output 64 which is in a low con dition only at timeswhen all five stages of the binary accumulator are at their maximumcount conditions which occurs only when the counter has 31 accumulatedtherein.

Each stage 300-308 of the accumulator 14 has a respective 6 outputterminal 320, 322, 324, 326 and 328, and the combined signals present onthese terminals represent the binary complement of the accumulation inthe counter 14. The Q outputs in addition to being connected as alreadydescribed are connected to respective full adder or summing circuits330, 332, 334, 336 and 338 which are parts of the comparator circuit 16.The following truth table illustrates how the comparator circuit 16subtracts the binary numbers it receives from the five stages of thecounter 20 from the inputs it receives from the five stages of thecounter 14 by adding the complements of the counter 14 (sum of the Ooutputs) to the Q ou tputs of the counter 20. The complement of theresult S is the binary difference.

TRUTH TABLE 16 l O l 0 As indicated, the counter 20 is shown having fivestages 340, 342, 344, 346 and 348 which is the same number of stages asin the counter 14. The individual stages of the counter 20 can be setdirectly by inputs received on respective input leads 68, 70, 72, 74,and 76, and these stages are clocked by inputs received on the B counterinput lead 50 and reset by inputs received either from the escrowcontrol circuit 26 or from the payout control 28. The reset inputs arefed from the OR gate 172 on its output 170. Each stage of the counter 20also has a Q output identified respectively by numbers 350, 352, 354,356 and 358. Signals appearing on these outputs are inverted byrespective NOR gates 360, 362, 364, 366 and 368 and therefore the NORgates provide non-inverted binary outputs from the counter 20. Theseoutputs are applied respectively to the adder circuits 330, 332, 334,336 and 338 in the comparator circuit 16 in a manner similar to theinputs to the adders from the A counter 14.

The inhibit input lead 88 to the inhibit circuit 18 is shown in FIG. 3connected to a second input of each of the NOR gates 360-368. When thisinput has a high state it causes a low condition to be present at therespective gate outputs 370, 372, 374, 376, and 378 and in so doingcauses an inhibit function to take place between the B counter 20 andthe comparator circuit 16. This would prevent the comparator circuit 16from receiving signals from the B counter 20. Y

The comparator circuit 16 includes a parallel carry circuit portion 380which provides carry out control signals on the carry-out lead 92. Whenthe signal on the carry-out lead 92 is low it means that the binarycount in B counter 20 is not larger than the binary count in the Acounter 14. The carry-out lead 92 will remain low as long as thecounters are in an equal condition or in a condition where the A counter14 has a larger accumulation than the B counter 20. The comparatorcircuit 16 also has a carry-in lead 382, and this lead is normally heldlow and is included to provide an additional control parameter for otherfuture uses such as for use with other designs which allow additionaloperating possibilities.

Another AND gate 384 is included in the circuit of the B counter 20and'has a plurality of input'terminals which are connected respectivelyto the O outputs of the stages 340-348. The gate 384 has a low on itsoutput 124 whenever there is any count present on the B and NAND gates392 and 394 which are connected as shown. The outputs of the decodercircuit 24 are present on the output leads 94, 96, 98, 100 and 102 andthese outputs indicate the various relationships that exist between thevalues accumulated in the A and B counters 14 and 20. These conditionsare indicated by the presence of a low on the respective output leads.For example, when the amount accumulated in the A counter 14 is equal tothe amount accumulated in the B counter 20 the output on the decoderoutput lead 94 will be low, and the outputs on the other decoder outputleads will be high. By the same token and in similar manner, when thecounter 14 has accumulated in it a larger amount than is accumulated intheB counter 20, the output on the output lead 96 will be low. When theamount in the A counter 14 is larger than the amount in the B counter bytwo, three and four increments, then the output on output lead 98 willbe low. When a coin tube switch such as the dime coin tube switch 108 isclosed indicating the tube is empty and producing a low condition on thelead 104, which lead is connected to lead 396, it will operate toinhibit the output on the lead 98. When the counter 14 has three or moreincrements more than the counter 20, the output 100 will go low toindicate the condition. This condition, while available, is not used inthe circuit as shown, but could be particularly if the circuit wereadapted to other coinage systems.'When the A counter 14 has five or moreincrements more than the B counter 20, the output on the lead 102 goeslow unless atthis time the quarter empty tube switch 110 is activatedputting a low on connected leads 106 and 398 and on the input to thegate associated with the Z 5 lead 102.

The decoder circuit 24 has other connections which operate to preventcertain outputs from occurring; For

example, when the output lead 98 is low it prevents the associated withthe lead 96 as will be explained later.

In like manner, whenever the output on the lead 102 goes low it willprevent outputs on the leads 96 and 98 from going low by signals on lead402 which is connected between the output of the gate associated withthe output lead 102 and the inputs to the gates associated with theoutputs 96 and 98. Consequently, if the inhibit Z 5 lead 398 is low, theg 2 output on the lead 98 will go low for any count present in the .Acounter 14 that is two or more (5, 6, etc.) greater than the amountaccumulated in the B counter 20. Similarly,

a five increment coin such as a quarter is not available for refund orescrow, the circuit, as shown, will indicate that a two increment coinsuch as a dime should be refunded instead, and if dimes are likewise notavailable then the circuit will indicate that refunds are to be made inone increment coins only, namely, in nickels. It should be apparent thatthe present circuit can also be used with any known coinage systemregardless of the relative increment values of the coins involved,although some minor changes in the connections may be required.

The decoder circuit 24 has another inverter 404 which is connectedbetween the carry-out output lead 92 of the comparator circuit 16 andthe various output gates of the decoder circuit 24. For example, theinverter 404 provides a low condition on lead 406 to prevent any falseoutputs from being produced by the decoder 24 when the A counter 14 hasan amount accumulated therein that is less than the amount accumulatedin the B counter 20. The outputs on the lead 406 are applied to theinputs of a plurality of decoder output gates including NAND gate 408which is the gate that produces the outputs on the lead 94 to indicate acondition of equality between the amounts accumulated in the counters 14and 20. The equality condition, as aforesaid, is indicated by a low onthe lead 94 and this occurs whenever the output lead 410 of NOR gate 412goes high due to a low on its input lead 414. This happens when theinverted output 5 on lead 416 from the first stage adder circuit 330indicates a zero state and when the other input to the gate 412 on lead418 is low due to the condition of the inverted outputs of the otheradder circuits 332, 334, 336 and 338 which appear as inputs to anotherNAND gate 419. The output of the NAND gate 419 appears in the lead 418and on connected lead 420 indicating a zero state by the condition ofthe NAND gate 419. Under these conditions another NAND gate 424 willindicate this condition and produce a Z 1 function on its output lead 96by having it go low when the output to it on lead 426 (which isconnected to the output lead 94 of the gate 408) is high indicating theabsence of an equality condition, A B. The lead 426 is connected betweenthe decoder output lead 94 of the NAND gate 408 and one of the inputleads to the NAND gate 424, which is the Z I gate. The conditions justdescribed also require that another input to the gate 424 on lead 428 beat a high condition indicating that the amount in the A counter 14 isnot smaller than the amount in the counter 20, that input 430 to thegate 424 be high indicating the absence of a g 5 condition, and that theother input lead 432 of the gate 424 be also high indicating that the 22 condition is not present.

Another decoder circuit output NAND gate 434 is associated with the Z 2output lead 98 and provides a low output condition thereat when 1 inputlead 436 is high indicating that the counter 14 has an amount that isnot smaller than the amount in the counter 20, (2) inhibit input on lead396 is high so as not to inhibit the gate, (3) input lead 420 from theoutput of the NAND gate 419 is high, and (4) the input it receives onlead 402 (output lead 102) is also high representing the absence of theI 5 condition.

Another NAND gate 440 associated with the decoder 5 3 output lead 100provides a low to represent the condition of 2 3. This condition, whilenot used in the circuit as shown, is available and occurs when the gateinput lead 406 is high at a time when there is also a high on the othergate input lead 442 which lead is connected to the output of the NANDgate 392. This lead is high when the gate input on lead 444 is low dueto the operation of another NAND gate 446 producing a high outputcondition. The NAND gate 446 has inputs connected respectively to theoutputs of the inverter circuits 386 and 388 which inverters produceinverted forms of the outputs of the adder circuits 330 and 332. TheNAND gate 392 also depends on inputs it receives from the output ofanother NAND gate 448 especially when these inputs go low. The NAND gate448 has direct input connections to the outputs of the adder circuits334, 336 and 338 which are the adders associated with the third, fourthand fifth stages, respectively, of the counters 14 and 20.

Another decoder NAND gate 450 is provided in association with the z 5output lead 102. The NAND gate 450 produces an output low on the lead102 when (1) its input on the lead 406 is high indicating that thecounter 14 has an amount accumulated that is not less than the amountaccumulated in the counter 20, (2) the inhibit input lead 398 is high sothat it is not being inhibited, and (3) its other input lead 452 islikewise high. The lead 452 is connected to the output of the NAND gate394 and provides a high whenever the inputs to the gate 394 from theadder circuits 336 and 338 in the comparator circuit 16 are low or itsother input on lead 454 is low. The lead 454 is connected to the outputof another NAND gate 456 which has two inputs one of which is connectedto the output of the inverter circuit 390 on lead 458, and the other onlead 460 is'connected to the output of yet another NAND gate 462. TheNAND gate 456 will provide a low on the output 454 whenever the outputfrom the adder circuit 334 as inverted by the inverter 390 on lead 458is high and its other input on the lead 460 from the NAND gate 462 isalso high. The NAND gate 462 provides a high output when either theoutput of the first stage adder circuit 330 or the output of the secondstage adder circuit 332 is low.

The control circuits shown in FIG. 3 provide a large measure offlexibility and selectivity in their construction and operation, and, aspointed out, lend themselves to use under a variety of differentoperating circumstances including a variety of different vend pricepossibilities, coin denomination possibilities, and a variety ofselectivity with respect to the outputs pro duced. These possibilitiesmanifest themselves in the circuit as disclosed by providing controlover the vend control means, the payout control means, the escrowcontrol means and the other circuits and circuit elements associatedtherewith.

SINGLE PRICE VEND CONTROL DETAILS FIG. 4 shows circuit detailsspecifically designed to provide control for a single price vendingmachine. This is to be contrasted with the circuit shown in FIG. 5 whichis a dual price control circuit and will be described later. Thecircuits of FIGS. 4 and 5 also contain the details of the associatedescrow control and payout control means. The vend control 30 is enabledby the presence of a signal on its enable input lead which is from theoutput of the AND gate 122. The AND gate 122, as already described,hasinputs from the carry output from the comparator circuit 16 which arepresent on the lead 92 and is effective when the carry output is low toindicate that the accumulation in the counter 14 is equal to or greaterthan the accumulation in the counter 20, and from the B counter 20 whenthe B lead 124, which indicates that the B counter 20 has anaccumulation greater than zero, to produce a low on the lead 124.

The vend price that is entered in the B counter 20 is introduced fromthe price encoder circuit 22 by way of the AND gate 126, and its outputconnection 128 goes high whenever the accumulation in the counter 20 isgreater than zero. This is the condition that exists when there is ahigh on thedecoder output lead 94 indicating an equal condition betweenthe accumulations in the counters l4 and 20, and where there is a highon another input lead 470 to the gate 126. The lead 470 goes high inresponse to a condition existing on inverter circuit 472 at the timewhen a selection is made in the vending machine (not shown). This changecauses cur rent to flow from an input control terminal 474 (connected tothe vending machine) to activate an electrooptical device shown asoptical coupler 476. The coupler 476 operates through a mode-switch 478to cause the input lead 480 of the inverter 472 to go low at a time whenthe output lead 128 of the gate 126 goes high thereby establishingcircuits to enter the price in the B counter 20. The actual entry occursby causing highs to be present at certain of the leads 68-76 which arethe leads connected between the price encoder circuit 22 and the stagesof the B counter 20. This depends upon the setting of the plurality ofswitches connected to the leads 128. These switches are designatedgenerally by the number 481 and their combined setting conditionsestablish the vend price.

As in copending US. patent application Ser. No. 331,380, the elements ofthe circuit associated with the optical coupler 476 include resistors482 and 484, capacitor 486, and diode 488 connected as shown. Theseelements and their connections enable the coupler 476 to pulse when aselection is made in the vending machine. The mode-switch 478 is shownin the drawing in position to provide refunds of accumulation until aproduct is selected. When the mode-switch 478 is moved to its oppositeposition it causes the established vend price to be transferred into thecounter 20 in the manner described as soon as j-k flip-flop circuit 490,also in the vend control circuit 30, is reset. When the j-k flip-flop490 is clocked or caused to go to a low condition by a signal on itsenable input 120 from the gate 122, its Q output terminal 492 goes lowthereby causing its j input 494 and its k input 496 to also go low toprevent any possible further clocking of the flip-flop and to inhibit(hold its reset condition low) the escrow control 26 by way of a signalappearing on the escrow inhibit lead 132. Vend time, which is the timethat the vend relay 498 is energized and its contacts 500 transferredfrom engagement with a stationary contact associated with lead 502 toengagement with a stationary contact associated with the lead 504, iscontrolled by input signals or responses that are fed from the j-kflipflop circuit 490 to and through a NAND gate 506 by way of leads 508and 510. The input lead 508 is connected to the Q output terminal 512 ofthe flip-flop 490 and goes 11gb as soon as the j-k flip-flop 490 itselfgoes high. The Q output 492 was high until the input to the gate circuit506 on the lead 510 became high and remained high until the low on the Qoutput 492 allows capacitor 514 to discharge through resistor 516, bothof which are connected in parallel and between the base element oftransistor 518 and ground. The resistor 516 and the capacitor 514'areincluded to forward bias the transistor 518 and to cause the input tothe gate cir- 5 cuit 506 on the lead 510 to go low. 7

Another AND gate 520 is provided to reset the j-k flip-flop 490 bysignals received on its input terminal 522 whenever the escrowcontrol 26is set, or by signals received on its other input lead 524 whenOR gate526 has its output lead 528 go low. This condition occurs when the input530 to the gate 526is low after vend time and when its other input 532is also low indicating that the same count exists in both of thecounters 14 and 20. This occurs either when the accumulation is equal tothe vend price or when the payout of change as added to the vend priceentered in the B counter causes the accumulation in counter 20 to equalthe accumulation in the counter 14. Whenthe accumulation in the counter14 does not equal the accumulation in counter 20 after vend time is overas indicated at the lead 510, another inverter 534 connected to the lead510, has its output on lead 536 go high. This high is applied as anenable inputto the OR. gate 134 in the enable circuit to the payoutcontrol 28 and causes a high on the lead 140 which isthe enable inputlead to the payout control 28.

When a payout condition is called for by a high at the enable input lead140, a payout motor 540 will be energized. This is because there willalso then be a high on the input lead 542 of another NAND gate 544 torepresent the condition when the amount accumulated in the counter 14 isnot equal to the amount accumulated in the counter 20. Therefore, sincetheNAND gate 544 at this time has highs on both of its inputs 542 and140,, its output 548 will be at a low to cause a transistor 550 to beforward biased through zenerdiode 552. The zener diode 552 is connectedinto the base circuit of the transistor 550 in series with a currentlimiting resistor 554 and with other biasing resistors 556 and 558connected as shown. The zener diode 552 provides isolation between themotor supply and logic circuitry.

Another resistor 560 and capacitor 562 are connected in a circuit acrossthe payout motor 540 to suppress motor noise. The resistor 558 assuresturnoff of the transistor 550 whenever it is not forward biased by theNAND gate 544. When the payout motor 540 is energized it will operatemeans to payout one increment coins. However, when the motor 540 isoperated in conjunction with relay 564, to be described later, it willpayout two increment coins, and when the motor 540 is operated inconjunction with another relay 566 it will payout coins of fiveincrement value. The two increment relay 564 is energized when NAND gate568 has highs on both of its input leads 570and 572. The input lead 572goes high when the input to an inverter circuit 574 on lead 576 goeslow. This occurs when there is a low on the 2 2 lead 98.

The five increment relay 566 is energized when NAND gate 578 has itsinputs on leads 580 and 582 high. The input on lead 580 goes high duringa payout operation due to a high being present on the payout inputenable lead 140, and the input lead 582 goes high when an invertercircuit 584 has a low on its input lead 586. The lead 586 is connectedto the g 5 output 102 from the decoder circuit 24. I

The payout control circuit 28 has output connections 160, 162 and 164which are connected to respective input leads 52, 54 and 56 of the clock12 as shown in FIGS. 1 and 2. The outputs from the payout controlcircuit 28 provide momentary low pulses which program the clock circuit12 so that the clock circuit will produce one, two or five clock pulses,respectively. The leads 160, 162, and 164 of the payout control circuit28 are connected respectively as outputs of OR gates 588, 590 and 592which provide pulses whenever the voltages on a lead 594 goes low undercontrol of the operation of the payout motor 540 which operates a motorpulse switch 596 through a mechanical connection therewith. Themomentary closing of the switch 596 operates through a pulse shapingcircuit which is formed by resistors 598, 600 and 602 and capacitors 604and 606 to produce the output pulses that occur on the lead 594. Thepulse shaping circuit is similar to the pulse shaping circuit used inthe credit input circuit 32 described in connection with FIG. 2. Whenthe lead 594 is pulsed to a low condition, the one increment OR gate 588will provide the pulsed low output on lead 160 if at the same time the E1 output lead 96 is also low. In like manner, the OR gate 590 willprovide an output pulse on lead 162 when the z 2 output on lead 98 islow, and when the z 5 output on lead 102 is low at a time when there isa low on the lead 594 there will be a pulse on the lead 164. When themotor switch 596 closes it discharges the capacitor 606 in the pulseshaping circuit as each coin is paid out and this action will operatethrough an inverter circuit 608 to cause a high to be produced on outputlead 610 which is the B enable lead, also labeled 48 in FIG. 1. This isthe signal which causes the clock 12 to feed signals to the B counterinstead of to A counter 14. Hence, a signal on the lead 48 provides thatthe clock pulses will be directed to the counter 20 during payoutoperations. Thereafter, when the accumulation in the 8 counter 20 isreduced to the point where it equals the accumulation in the A counter14 during payout, the lead 94 which represents this equality will go lowto provide a low at the output 528 of the gate circuit 526 which islocated in the vend control circuit 30. This low is connected to input612 of another gate 614 in the payout control circuit 28. At the sametime, if the other input 616 of the gate 614 goes low because of thecondition on the output lead 140 of the gate 134, the output of the gate614 on lead 618 will go low causing the counters l4 and 20 to be resetby signals present on the reset output leads 168 and 170 which arerespectively under control of inverter 620 and gate circuit 622. Thesecir cuits are both momentarily pulsed' by a circuit which includescapacitor 624 and resistor 626.

ESCROW CONTROL DETAILS The details of the escrow control circuit 26provided to return an amount deposited and accumulated undercircumstances where a vend operation is not achieved are also shown inFIG. 4. Escrow operations are under control of the operator actuatableescrow switch 144 when the movable switch contact is moved from itsnormal to its transferred position. When the switch 144 is operated itcauses an enable input signal to be applied to input lead 630 of j-kflip-flop 632 and this input goes high and then low. 'lliis causes theflip-flop circuit 632 to have a low on its Q output 634. This also holdsthe j and k inputs 636 and 638 low and prevents further changes in thestate of the flip-flop even though additional changes should occur onthe input lead 630. The

inhibit output lead 146 supplies inhibit outputs from the escrow control26 to the'vend control circuit 30 to keep the vend control circuit 30from being activated during escrow. This is done by holding the j-kflip-flop circuit 490 in its reset state by applying the low on the lead146 to the reset input 640. A capacitor 642 and a resistor 644 are alsoconnected in the output circuit of the escrow flip-flop 632 to provide alow to one of the inputs of the gate-circuit 622. The gate 622 wasdescribed above in connection with the payout control'28 and has itsoutput lead 170 connected to the reset input R of the B counter 20. Asalready indicated, the payout control 28 is enabled by a high present onthe enable input lead which lead is connected through the gate 134 fromthe Q output lead 646 of the escrow flip-flop 632. When the payoutcontrol 28 causes the counter 20 to have an amount accumulated thereinthat is equal to the amount accumulated in the counter 14 as indicatedpreviously, an output will be present on the lead 94 which is the A Boutput, and this output will be low and will cause the escrow controlcircuit 26 to be reset by a reset input applied to the reset input lead648 of the flip-flop 632. This signal is applied by way of gate circuit650 which has one input connected to the lead 94 and the other input tothe lead 132. Thereafter, the inputs on the two input leads 542 and 140of the NAND gate 544 in the payback control circuit 28 are caused to golow, and as soon as this happens the payback operation will terminate.

VEND CONTROL DETAILS (MORE THAN ONE PRICE) FIG. 5 shows an alternateembodiment of the subject vend control circuit 30 wherein it is able tohandle more than one vend price. Vend control leads 660 and 662 on theright side of FIG. 5 provide inputs to monitor a selection in thevending machine as well as to apply a control potential available onanother lead 664 for two different respective vend prices. One vendprice is determined and set into the machine by means of switches 666,668, 670, 672 and 674 which are in a price encoder circuit shown in thelower lefthand corner of FIG. 5, and the other vend price is set intothe circuit and determined by the setting of another-set of switches676, 678, 680, 682 and 684 also in the price encoder circuit 22. When aselection is made in the vend control circuit 30, it provides a pathfrom either vend control lead 660 or from vend control lead 662 to causecurrent to flow from lead 686 through the optical coupler 688 or 690,respectively. Current flow through the associated couplers is limited byassociated resistors 692 and 694 and is rectified by associated diodes696 and 698. The current that flows through these circuits will causethe corresponding optical coupler 688 ro 690, each of which includes alight emitting diode 700 or 702, respectively, to illuminate anassociated photo-transistor 704 or 706. In the drawing, the lightemitting diodes 700 and 702 are shown separated from the associatedtransistor portions 704 and 706 of the same devices. This is done forconvenience in the drawing but in an actual construction each diode ispositioned in the same envelope with its associated phototransistor.When a price selection has been made and the respective phototransistors704 (or 706) is caused to saturate (provide a good current flow pathbetween its collector and emitter) clock pulses are applied to,

the clock input terminals 708 (or 710) of the respective j-k flip-flopcircuits 712 and 714. This will occur as long as the payout control lead140 is not activated or at its low. When this happens, one of theflip-flops 712 or 714 will be operated and the other not, and which everone has its Q output 716 or 718 go low will cause the opposite flip-flopcircuit to be held in a reset condition. This is accomplished by meansof a circuit which includes cross-coupled gates 720 or 722. These gatesare included to make sure that onlyone of the vend relays 724 or 726 canbe energized at any one time. Transistors 728 and 730 are provided inthe respective output circuits of the j-k flip-flops 712 and 714 toprovide an interface between the vend relays 724 and 726 and theassociated Q terminals 732 dand 734 of the flipflops 712 and 714.

The reset inputs736 and 738 of the flip-flops 712 and 714 are controlledby the gates 722 and 720 respectively which provide the necessary resetlow conditions whenever the opposite flip-flop 714 or 712 is turned onby inputs which appear at the respective gate input terminals 744 or 746at times when output lead 748 of another AND gate 750 is low.

The gate 750 is included in the reset circuit to provide the resetfunction whenever another optical coupler which is the reset opticalcoupler 756 is activated which occurs during product delivery when thecarry output lead 92 from the decoder circuit 24 goes high. This occurswhen the A counter 14 has less accumulaton than the'price accumulated inthe counter as well as when total reset occurs because of a signal on alead such as on lead 758 of FIG. 4.

The vend control lead 760 in FIG. 5 (lower right I hand corner) isconnected to cause current to flow through the optical coupler 756 andthrough light emitting diode (LED) 762 during a product deliveryoperation. A resistor 764 and a diode 766 are connected in series withthe light emitting diode 762 to control the amount and direction of thecurrent flow. The light emitting diode 762 of the optical coupler 756 isin the same envelope with photo-transistor 768. Whenever selection ismade of a particular product and the selection causes clocking of one ofthe j-k flip-flops 712. or 714, this will cause a lead 770 to go highbecause of the operation of an OR gate 772 which has its inputs 774 and776 connected respectively to the Q output terminals 732 and 734 of theflip-flops 712 and 714. The same highs also occur at respective inputterminals 782 and 784 of other AND gates 786 and 788 and cause a high toappear at gate output 790 or 792 of the gates 786 and 788. The otherinputs on leads 794 and 796 to the same gates are also high because theyare are connected to output terminal 798 of inverter circuit 800. Thehigh that appears on the lead 770 as discussed above is delayed somewhatby operation of a capacitor 802 which causes the output of the invertercircuit 800 on lead 798 to go low at a slightly later time, thus causingthe high that is fed to the price encoder circuit 22 to be momentarilypulsed. The circuit just described also includes OR gate 804 which hasan input 806 that goes high under control of signals received on thepayout lead 140 to prevent any possible encoding from taking placeduring a payout operation.

When the vend price is encoded by the encoder circuit 22 due to thepresence of a signal on either lead 790 or 792, an output will appear onthe encoder output leads 68-76 which connect the encoder to the Bcounter 20. The accumulation entered in the B counter 20 is thencompared in the comparator circuit 16 to the accumulation in the Acounter I4. and this will result in producing a clocking output on theenable lead of the vend control 30 if there is, an equal or greateraccumulation in the counter 14 than in the counter 20. If there is notenough credit accumulated in the counter 14 to produce a vend then thecarry output on lead 92 will cause another lead 808 (FIG. 5) to go lowthereby resetting whichever binary flip-flop 712 or 714 initiated theevent. However, when there is sufficient credit to provide clocking ofanother j-k flip-flop circuit 810 in the vend control circuit 30, thelow condition established at its 6 output terminal 812 will cause acapacitor 814 to discharge through a resistor 816 to thereby provide adelayed conduction by an associated transistor 818. The transistorthereafter provides a high on lead 820 which is connected to the outputside of aninverter 822. This condition is necessary for payout. and thelow which is produced at the output side of the transistor 818 is alsopresent on input terminal 8240f another OR gate 826. The gate 826 in thecircuit of FIG. 5 is similar to and operates similar to the gate 526 inthe circuit of FIG. 4. It also has similar connections. The circuitsassociated with the gate 826 including also the flip-flop circuit 810and its connections and associated circuitry are similar to thosedescribed above in connection with FIG. 4.

When a low is applied to the input terminal 824, of the gate 826, a lowwill be produced at the gate output on lead 828. This will happen assoon as the other gate input lead 830 to the gate 826 is low indicatingeither that the accumulation in both counters l4 and 20 is the same orthat the accumulation in the counter 14 exceeds the vend price. The lowproduced on output lead 828 of the gate 826 is applied to inputterminal832 of another gate 834 and is used to reset the j-k flip-flop 810. Theflip-flop 810 can also be reset by a signal applied on the lead 808 whenthe output terminal 92 of the comparator circuit 16 goes high. The samecan also occur when the escrow output lead 146 goes low.

Another gate 836 is connected in the circuit associated with theflip-flop 810 to control the inhibit operation of the escrow controlcircuit 26 which is applied thereto on lead 132 from the output of thegate 836. This circuit is available when the 6 output lead 812 of theflip-flop 810 is low and while the lead 770 which is applied to theinput of another inverter 838 is high.

To provide the capability of vending at still more vend prices simplyrequires adding additional price coding switches and associatedisolation gating and vend control circuitry, all of which can beconnected in a manner similar to that already described. Furthermore,whereas the subject invention is shown employ ing D-type flip-flopcircuits for the counters l4 and 20, the same can be accomplished usingj-k flip-flops for these elements as well as other bistable devices. Theaccumulation means can also include ring counters; shift registers,counters capable of counting in both directions, and other binaryaccumulation devices. Also, the means selected for use in the comparatorand decoder circuits as disclosed can be accomplishedby EXCLU- SIVE ORgates, half-adders and other state-of-the art devices and techniques.The pulse generating means can also be similar to that disclosed incopending Levasseur US. patent application Ser. No. 267,558, which isassigned to Applicants assignee. Other suitable pulsing devices are alsoknown and could be used.

it is also anticipated that the types and combinations of gates andother elements and their interconnections can be varied substantially insome cases from the particular embodiments as disclosed withoutdeparting from the basic inventive concepts and the basic functions andoperations as set forth and described herein, Furthermore, certainfeatures as disclosed can be omitted from the circuit for operational orexpense reasons. For example, the escrow control, the feature of beingable to payout in multiple coin denominations, and the use ofphotodiodes can be substituted for by other similar devices includingelectrical and magnetic devices capable of performing similar functions.The use of phototdiodes in certain portions of the subject circuit asdescribed is preferred because of the type of signals they produce andthe type of signals that the circuit is capable of using and respondingto. Such devices are also relatively small and are reliable andrelatively maintenance free.

Thus there has been shown and described a novel and extremely versatilevending control circuit which fulfills all of the objects and advantagessought therefor. It is apparent, however, as indicated, that manychanges, modifications, variations, and other uses and applications ofthe subject control are possible and will become apparent to thoseskilled in the art after considering this specification which describesseveral embodiments and the accompanying drawings. All such changes,modifications, variations and other uses and applications which do notdepart from the spirit and scope of the invention are deemed to becovered by the invention which is limited only by the claims whichfollow.

What is claimed is:

l. A circuit for controlling a vending machine capable of vendingproducts and of refunding amounts deposited in excess of the vend pricecomprising a first counter circuit having input, output and resetconnections, means including a programmable clock circuit connected tothe counter in and operable to introduce input pulses for feedingthereto when credit is introduced into the vending machine, said clockcircuit having a credit input, a refund input, an enable input, anoutput and reset connection means, said clock producing output pulses atits output connection means corresponding to each credit and refundinput received thereat, means connected to the credit input of the clockto energize the clock circuit according to an amount of credit to beentered into the first counter, a second counter having an input, anouput and a reset terminal, price encoder means operatively connected tothe input to the second counter and including means for transferring anestablished vend price from the price encoder means to the secondcounter, means for comparing amounts accumulated in the first countercircuit with the vend price entered in the second counter includingmeans to generate an electric response to indicate which of the firstand second counter circuits has the greater accumulation therein, meansfor enabling a vend operation to take place whenever the amountaccumulated in the first counter circuit at least equals the vend priceentered in the second counter circuit, payoutmeans operativelyconnectedto the comparing means and energizable thereby to refund amounts in thefirst counter circuit which exceed the vend price entered in the secondcounter circuit, said payout means including means to add to the vendprice entered in the second counter circuit an amount equal to theamount of each refund until the first and second counter circuits havethe same amount accumulated therein, and means associated'with the meansfor comparing that are responsive to the occurrence of equalaccumulations in the first and second counter circuits to reset the saidfirst and second counter circuits and the payout means.

2. The circuit defined in claim 1 including escrow means operativelyconnected to the payout means and to the vend enabling means, and meansto initiate the escrow operation to refund amounts deposited, saidcscrow means including means which when an escrow operation is initiatedinhibit operation of the vend enabling means.

3. The circuit defined in claim 1 including escrow means operativelyconnected to the payout means and to the vend enabling means, and meansin the vend enabling means to inhibit operation of the escrow meanssimultaneously with the initiations of a vend operation.

4. The circuit defined in claim 1 including means to inhibit a vendprice entered in the second counter circuit from being communicated tothe means for comparing the vend price to the amount accumulated in thefirst counter circuit.

5. The circuit defined in claim 1 including means connecting the payoutmeans to the programmable clock circuit whereby each time the payoutmeans pro duces a signal it will be applied to the refund input of theprogrammable clock circuit to cause said clock circuit to produce anoutput representative of the value of the refund, and means for feedingsaid clock outputs to the second counter circuit.

6. The circuit of claim 1 wherein the first and second counter circuits,the means for comparing, the price encoder means and the circuitconnections therefor are all included in a single integrated circuitchip.

7. The circuit of claim 1 wherein said means to generate a response toindicate which of the first and second counter circuits has the greateraccumulation includes a difference decoder circuit having a first outputat which signals are produced to represent equal accumulations in thefirst and second counter circuits, and other outputs at which signalsare produced to represent the magnitude of the difference between theamounts accumulated in the first and second counter circuits.

8. A control circuit for vending and other money controlled machinescomprising a first counter for accumulating credit amounts introducedinto the machine, a second counter and means for entering into thesecond counter amounts equal to an established vend price, a comparatorcircuit having first input means connected to respond to amountsaccumulated in the first counter and second input means connected torespond to amounts accumulated in the second counter, comparator outputmeans including decoder circuit means responsive to a comparison betweenthe amounts accumulated in the first and second counters, said decodercircuit means having a plurality of outputs at which signals areproduced to represent respectively equality or preselected amounts ofdifference between the amounts accumulated in the first and secondcounters, a vend'countrol circuit having an enable input operativelyconnected to the comparator circuit, said enable input receiving a vendcontrol enable input signal whenever the comparator circuit indicatesthat the first counter has an amount accumulated in it at least equal tothe amount accumulated in the second counter, a payout control circuithaving a plurality of inputs connected to the respective outputs of thedecoder circuit means including the outputs at which signals areproduced that represent preselected amounts of excess difference betweenthe amounts accumulated in the first counter relative to amountsaccumulated in the second counter, said payout control circuit alsohaving a reset input connected to receive outputs of the decoder circuitmeans when the comparator circuit indicates that the amount accumulatedin the first and second counters is the same, said payout controlcircuit including means to produce output singals to cause the refundingof said excess accumulations.

9. The control circuit defined in claim 8 wherein said first and secondcounters, said comparator circuit, and said decoder circuit are parts ofa single integrated circuit chip.

10. The control circuit defined in claim 8 including controllable meansconnected between the outputs of the second counter and the comparatorcircuit to control communication therebetween.

11. The control circuit defined in claim 8 including means associatedwith the first counter to prevent the loss of a maximum possibleaccumulation therein when inputs are received at times when the firstcounter has its maximum capacity accumulated therein.

12. The control circuit defined in claim 8 including means to selectbetween different vend prices for entering in the second counter.

13. The control circuit defined in claim 8 wherein the first and secondcounters are formed by a plurality of serially connected bi-stableflip-flop circuits.

14. The control circuit defined in claim 8 wherein the vend controlcircuit includes a photoelectric diode having a light emitting portionconnected to be energized when a vend operation is initiated and a lightsensitive portion responsive to light emitted by the light emittingportion, said light sensitive portion being connected in the circuitbetween the means for entering the established vend price and the secondcounter.

15. The control circuit defined in claim 14 wherein a similarphotoelectric diode and associated circuitry are provided for eachpossible vend price that can be selected.

16. The control circuit defined in claim 8 including an escrow controlcircuit operatively connected to the payout control circuit and to thevend control circuit, said escrow control circuit including an operatoractuatable escrow switch, actuation of which energizes the escrowcontrol circuit and the payout control circuit to cause refunds of thetotal amount of an accumulation entered in the first counter, saidenergized escrow control circuit including output means forsimultaneously inhibiting operation of the vend control circuit.

17. The control circuit defined in claim 16 including means to inhibitoperation of the escrow control circuit whenever the vend controlcircuit is actuated by selection of a vend at a time when the amountaccumulated in the first counter at least equals the vend price.

18. A vend control circuit comprising a first counter for accumulatingcredit amounts entered in the machine,

amounts refunded,

a counter input circuit including a pulse genrator having first andsecond input and output means, said first output means being operativelyconnected to the first counter and said second output being operativelyconnected to the second counter,

a source of credit input signals connected to the first input means ofthe pulse generator for energizing the pulse generator to produceoutputs at said first output means to represent the value of each creditamount entered in the machine,

price encoder means operatively connected to the second counter havinginput and output means, means connecting the output means of said priceencoder means to the second counter,

means to compare amounts entered in the first counter to amounts enteredin the second counter including means to indicate if the amounts areequal or different and if different the amount of the difference, and

vend enabling circuit means operatively connected to the comparisionmeans including means to initiate a vend operation in the vendingmachine whenever the amount accumulated in the first counter at leastequals the vend price in the second counter.

19. The vend control circuit of claim 18 including:

payout circuit means operable under control of the indicating means torefund amounts deposited in excess of the vend price, said payoutcircuit means having an output at which signals are produced torepresent the amount of each refund,

means connecting the output of said payout circuit to the second pulsegenerator input, and

other means connected between the payout circuit means and the pulsegenerator to cause said pulse generator to feed outputs from its secondoutput means to the second counter during payout operations until themagnitude of the amount accumulated in the second counteris equal to themagnitude of the amount accumulated in the first counter.

20. The vend control circuit of claim 19 wherein said payout circuitmeans includes means under control of the indicating means to payoutcoins of different denominations depending on the difference between theamounts entered in the first and second counters.

211. The vend control circuit of claim 18 wherein the means to indicatethe difference between the amount entered in the first and secondcounters include means to indicate when the difference is 1, Z 2, and Z5.

22. The vend control circuit of claim 18 wherein each of said first andsecond counters includes a plurality of serially connected bi-stablecircuit stages, and said means for comparing including a correspondingnumber of summer circuits each having corresponding pairs of inputconnections connected to the corresponding stages of the first andsecond counters.

23. The vend control circuit of claim 18 wherein the pulse generatorincludes an oscillator circuit.

24. The vend control circuit of claim 18 including means for refundingthe total amount of a credit entered in the first counter, said refundmeans including an operator actuatable refund switch, and meansoperatively connecting said refund means to the vend enabling circuitmeans, operation of said refund switch prior to initiation of a vendoperation operating to inhibit operation of the vend enabling circuitmeans.

25. A vend control circuit including means to control the vending of aproduct and the refunding of amounts deposited in excess of the vendprice comprising a first counter for accumulating credit amounts enteredin a vending machine when coins are deposited therein,

a second counter including means for entering a vend price therein,

other means for entering in the second counter amounts to represent thevalue of each coin refunded to the customer, counter input meansincluding means for generating signals to represent'the value of eachcoin deposited in the vending machine, means for comparing amountsentered in the first and Second counters, said comparing means includingmeans to indicate if the amounts entered are equal or are different, andif different the amount of the difference, vend enabling circuit meansoperatively connected to the comparing means including means to initiatea vend operation in the vending machine whenever the amount accumulatedin the first counter at least equals the vend price entered in thesecond counter, payout means operatively connected to the comparingmeans including means to payout coins as refunds to represent amountsentered in the first counter in excess of the vend price entered in thesecond counter, said payout means including means operatively connectedto the second counter to enter amounts therein to represent the value ofeach coin paid out and to increase the amount accumulated in said secondcounter, said comparing means producing an output when the amountaccumulated in the second counter equals the amount accumulated in thefirst counter, and means responsive to said equality output signal ofthe comparing means to terminate the payout operation and to reset thefirst and second counters. 26. The vend control circuit defined in claimincluding means actuatable by the customer to refund the total of anamount entered in the first counter prior to initiation of a vendoperation, said last named means including means to substantiallysimultaneously inhibit operation of the vend enabling circuit means.

27. A controL circuit for vending and other money controlled machinescomprising a first counter for accumulating credit amounts introducedinto the machine, a second counter and means for entering into thesecond counter amounts equal to an established vend price, a comparatorcircuithaving first input means connected to respond to amountsaccumulated in the first counter and second input means connected torespond to amounts accumulated in the second counter. comparator outputmeans including decoder circuit means responsive to a comparisionbetween the amounts accumulated in the first and second counters, saiddecoder circuit means having outputs at which signals are produced torepresent respectively equality or the amount of difference between theamounts accumulated in the first and second counters, a vend controlcircuit having an enable input operatively connected to the comparatorcircuit, said enable input receiving a vend control enable input signalwhenever the comparator circuit indicates that the first counter has anamount accumulated in it at least equal to the amount accumulated in thesecond counter, a payout control circuit having a plurality of inputsconnected to the respective outputs of the decoder circuit means, saidpayout control circuit also having a reset input connected to receiveoutputs of the decoder circuit means when the comparator circuitindicates that the amount accumulated in the first and second countersis the same, the other of said plurality of inputs to the payout controlcircuit being connected respectively to outputs of the decoder circuitmeans which represent various amounts accumulated in the firstaccumulator in excess of the amounts accumulated in the second counter,said payout control circuit including means to produce output signals tocause the refunding'of said excess accumulations, a source of clockpulses operatively connected to the inputs of the first and secondcounters, means to excite said clock source in response to deposit ofeach coin in the vending machine to cause said source to generate outputclock pulses corresponding to the value of each deposited coin for entryinto the first counter, other means including said payout controlcircuit having connections to the clock source to excite said source toproduce outputs to represent the value of each refund, means forentering clock pulses produced during refund into the second counter,and means to reset the payout control circuit whenever the comparatorcircuit indicates that the amount accumulated in the second counter isequal to the amount accumulated in the first counter.

1. A circuit for controlling a vending machine capable of vendingproducts and of refunding amounts deposited in excess of the vend pricecomprising a first counter circuit having input, output and resetconnections, means including a programmable clock circuit connected tothe counter in and operable to introduce input pulses for feedingthereto when credit is introduced into the vending machine, said clockcircuit having a credit input, a refund input, an enable input, anoutput and reset connection means, said clock producing output pulses atits output connection means corresponding to each credit and refundinput received thereat, means connected to the credit input of the clockto energize the clock circuit according to an amount of credit to beentered into the first counter, a second counter having an input, anouput and a reset terminal, price encoder means operatively connected tothe input to the second counter and including means for transferring anestablished vend price from the price encoder means to the secondcounter, means for comparing amounts accumulated in the first countercircuit with the vend price entered in the second counter includingmeans to generate an electric response to indicate which of the firstand second counter circuits has the greater accumulation therein, meansfor enabling a vend operation to take place whenever the amountaccumulated in the first counter circuit at least equals the vend priceentered in the second counter circuit, payout means operativelyconnected to the comparing means and energizable thereby to refundamounts in the first counter circuit which exceed the vend price enteredin the second counter circuit, said payout means including means to addto the vend price entered in the second counter circuit an amount equalto the amount of each refund until the first and second counter circuitshave the same amount accumulated therein, and means associated with themeans for comparing that are responsive to the occurrence of equalaccumulations in the first and second counter circuits to reset the saidfirst and second counter circuits and the payout means.
 2. The circuitdefined in claim 1 including escrow means operatively connected to thepayout means and to the vend enabling means, and means to initiate theescrow operation to refund amounts deposited, said escrow meansincluding means which when an escrow operation is initiated inhibitoperation of the vend enabling means.
 3. The circuit defined in claim 1including escrow means operatively connected to the payout means and tothe vend enabling means, and means in the vend enabling means to inhibitoperation of the escrow means simultaneously with the initiations of avend operation.
 4. The circuit defined in claim 1 including means toinhibit a vend price entered in the second counter circuit from beingcommunicated to the means for comparing the vend price to the amountaccumulated in the first counter circuit.
 5. The circuit defined inclaim 1 including means connecting the payout means to the programmableclock circuit whereby each time the payout means produces a signal itwill be applied to the refund input of the programmable clock circuit tocause said clock circuit to produce an output representative of thevalue of the refund, and means for feeding said clock outputs to thesecond counter circuit.
 6. The circuit of claim 1 wherein the first andsecond counter circuits, the means for comparing, the price encodermeans and the circuit connections therefor are all included in a singleintegrated circuit chip.
 7. The circuit of claim 1 wherein said means togenerate a response to indicate which of the first and second countercircuits has the greater accumulation includes a difference decodercircuit having a first output at which signals are produced to representequal accumulations in the first and second counter circuits, and otheroutputs at which signals are produced to represent the magnitude of thedifference between the amounts accumulated in the first and secondcounter circuits.
 8. A control circuit for vending and other moneycontrolled machines comprising a first counter for accumulating creditamounts introduced into the machine, a second counter and means forentering into the second counter amounts equal to an established vendprice, a comparator circuit having first input means connected torespond to amounts accumulated in the first counter and second inputmeans connected to respond to amounts accumulated in the second counter,comparator output means including decoder circuit means responsive to acomparison between the amounts accumulated in the first and secondcounters, said decoder circuit means having a plurality of outputs atwhich signals are produced to represent respectively equality orpreselected amounts of difference between the amounts accumulated in thefirst and second counters, a vend countrol circuit having an enableinput operatively connected to the comparator circuit, said enable inputreceiving a vend control enable input signal whenever the comparatorcircuit indicates that the first counter has an amount accumulated in itat least equal to the amount accumulated in the second counter, a payoutcontrol circuit having a plurality of inputs connected to the respectiveoutputs of the decoder circuit means including the outputs at whichsignals are produced that represent preselected amounts of excessdifference between the amounts accumulated in the first counter relativeto amounts accumulated in the second counter, said payout controlcircuit also having a reset input connected to receive outputs of thedecoder circuit means when the comparator circuit indicates that theamount accumulated in the first and second counters is the same, saidpayout control circuit including means to produce output singals tocause the refunding of said excess accumulations.
 9. The control circuitdefined in claim 8 wherein said first and second counters, saidcomparator circuit, and said decoder circuit are parts of a singleintegrated circuit chip.
 10. The control circuit defined in claim 8including controllable means connected between the outputs of the secondcounter and the comparator circuit to control communicationtherebetween.
 11. The control circuit defined in claim 8 including meansassociated with the first counter to prevent the loss of a maximumpossible accumulation therein when inputs are received at times when thefirst counter has its maximum capacity accumulated therein.
 12. Thecontrol circuit defined in claim 8 including means to select betweendifferent vend prices for entering in the second counter.
 13. Thecontrol circuit defined in claim 8 wherein the first and second countersare formed by a plurality of serially connected bi-stable flip-flopcircuits.
 14. The control circuit defined in claim 8 wherein the vendcontrol circuit includes a photoelectric diode having a light emittingportion connected to be energized when a vend operation is initiated anda light sensitive portion responsive to light emitted by the lightemitting portion, said light sensitive portion being connected in thecircuit between the means for entering the established vend price andthe second counter.
 15. The control circuit defined in claim 14 whereina similar photoelectric diode and associated circuitry are provided foreach possible vend price that can be selected.
 16. The control circuitdefined in claim 8 including an escrow control circuit operativelyconnected to the payout control circuit and to the vend control circuit,said escrow control circuit including an operator actuatable escrowswitch, actuation of which energizes the escrow control circuit and thepayout control circuit to cause refunds of the total amount of anaccumulation entered in the first counter, said energized escrow controlcircuit including output means for simultaneously inhibiting operationof the vend control circuit.
 17. The control circuit defined in claim 16including means to inhibit operation of the escrow control circuitwhenever the vend control circuit is actuated by selection of a vend ata time when the amount accumulated in the first counter at least equalsthe vend price.
 18. A vend control circuit comprising a first counterfor accumulating credit amounts entered in the machine, a second counterfor entry of a vend price and amounts refunded, a counter input circuitincluding a pulse genrator having first and second input and outputmeans, said first output means being operatively connected to the firstcounter and said second output being operatively connected to the secondcounter, a source of credit input signals connected to the first inputmeans of the pulse generator for energizing the pulse generator toproduce outputs at said first output means to represent the value ofeach credit amount entered in the machine, price encoder meansoperatively connected to the second counter having input and outputmeans, means connecting the output means of said price encoder means tothe second counter, means to compare amounts entered in the firstcounter to amounts entered in the second counter including means toindicate if the amounts are equal or different and if different theamount of the difference, and vend enabling circuit means operativelyconnected to the comparision means including means to initiate a vendoperation in the vending machine whenever the amount accumulated in thefirst counter at least equals the vend price in the second counter. 19.The vend control circuit of claim 18 including: payout circuit meansoperable under control of the indicating means to refund amountsdeposited in excess of the vend price, said payout circuit means havingan output at which signals are produced to represent the amount of eachrefund, means connecting the output of said payout circuit to the secondpulse generator input, and other means connected between the payoutcircuit means and the pulse generator to cause said pulse generator tofeed outputs from its second output means to the second counter duringpayout operations until the magnitude of the amount accumulated in thesecond counter is equal to the magnitude of the amount accumulated inthe first counter.
 20. The vend control circuit of claim 19 wherein saidpayout circuit means includes means under control of the indicatingmeans to payout coins of different denominations depending on thedifference between the amounts entered in the first and second counters.21. The vend control circuit of claim 18 wherein the means to indicatethe difference between the amount entered in the first and secondcounters include means to indicate when the difference is > or = 1, > or= 2, and > or =
 5. 22. The vend control circuit of claim 18 wherein eachof said first and second counters includes a plurality of seriallyconnected bi-stable circuit stages, and said means for comparingincluding a corresponding number of summer circuits each havingcorresponding pairs of input connections connected to the correspondingstages of the first and second counters.
 23. The vend control circuit ofclaim 18 wherein the pulse generator includes an oscillator circuit. 24.The vend control circuit of claim 18 including means for refunding thetotal amount of a credit entered in the first counter, said refund meansincluding an operator actuatable refund switch, and Means operativelyconnecting said refund means to the vend enabling circuit means,operation of said refund switch prior to initiation of a vend operationoperating to inhibit operation of the vend enabling circuit means.
 25. Avend control circuit including means to control the vending of a productand the refunding of amounts deposited in excess of the vend pricecomprising a first counter for accumulating credit amounts entered in avending machine when coins are deposited therein, a second counterincluding means for entering a vend price therein, other means forentering in the second counter amounts to represent the value of eachcoin refunded to the customer, counter input means including means forgenerating signals to represent the value of each coin deposited in thevending machine, means for comparing amounts entered in the first andsecond counters, said comparing means including means to indicate if theamounts entered are equal or are different, and if different the amountof the difference, vend enabling circuit means operatively connected tothe comparing means including means to initiate a vend operation in thevending machine whenever the amount accumulated in the first counter atleast equals the vend price entered in the second counter, payout meansoperatively connected to the comparing means including means to payoutcoins as refunds to represent amounts entered in the first counter inexcess of the vend price entered in the second counter, said payoutmeans including means operatively connected to the second counter toenter amounts therein to represent the value of each coin paid out andto increase the amount accumulated in said second counter, saidcomparing means producing an output when the amount accumulated in thesecond counter equals the amount accumulated in the first counter, andmeans responsive to said equality output signal of the comparing meansto terminate the payout operation and to reset the first and secondcounters.
 26. The vend control circuit defined in claim 25 includingmeans actuatable by the customer to refund the total of an amountentered in the first counter prior to initiation of a vend operation,said last named means including means to substantially simultaneouslyinhibit operation of the vend enabling circuit means.
 27. A controLcircuit for vending and other money controlled machines comprising afirst counter for accumulating credit amounts introduced into themachine, a second counter and means for entering into the second counteramounts equal to an established vend price, a comparator circuit havingfirst input means connected to respond to amounts accumulated in thefirst counter and second input means connected to respond to amountsaccumulated in the second counter, comparator output means includingdecoder circuit means responsive to a comparision between the amountsaccumulated in the first and second counters, said decoder circuit meanshaving outputs at which signals are produced to represent respectivelyequality or the amount of difference between the amounts accumulated inthe first and second counters, a vend control circuit having an enableinput operatively connected to the comparator circuit, said enable inputreceiving a vend control enable input signal whenever the comparatorcircuit indicates that the first counter has an amount accumulated in itat least equal to the amount accumulated in the second counter, a payoutcontrol circuit having a plurality of inputs connected to the respectiveoutputs of the decoder circuit means, said payout control circuit alsohaving a reset input connected to receive outputs of the decoder circuitmeans when the comparator circuit indicates that the amount accumulatedin the first and second counters is the same, the other of saidplurality of inputs to the payout control circuit being connectedrespectively to outputs of the decoder circuit means which representvarious amounts accumulated in the first accumulator in Excess of theamounts accumulated in the second counter, said payout control circuitincluding means to produce output signals to cause the refunding of saidexcess accumulations, a source of clock pulses operatively connected tothe inputs of the first and second counters, means to excite said clocksource in response to deposit of each coin in the vending machine tocause said source to generate output clock pulses corresponding to thevalue of each deposited coin for entry into the first counter, othermeans including said payout control circuit having connections to theclock source to excite said source to produce outputs to represent thevalue of each refund, means for entering clock pulses produced duringrefund into the second counter, and means to reset the payout controlcircuit whenever the comparator circuit indicates that the amountaccumulated in the second counter is equal to the amount accumulated inthe first counter.